Verilog Coding Styles

Wolfgang Hoeld of National Semiconductor Germany gave an excellent presentation last year on
this subject. His presentation materials are available here.

Errata sheet:

Page 4 - Use _n for active low signals. Tristate signals use the _z naming convention rather than
                _t.

Page 19 - Avoid using the flip flop with asynchronous set AND asynchronous reset. Logic using
                both of these can be rewritten in a more synchronous manner.

Verilog Mode

There are several modes for xemacs to automatically format your Verilog code. There is a list of
these and other Verilog utilities on Celia's EDA page. Vim supports Verilog by default.

Verilog Manuals etc.

Refer to the manuals page (http://www.eecs.umich.edu/courses/eecs627/manuals.html).