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University of Michigan
Electrical Engineering
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Past Seminars
Friday May. 24, 2013
Neuromorphic Chip Design with a Scalable Architecture for Learning in Networks of Spiking Neurons
Jae-Sun Seo
IBM T.J. Watson Research Center
Thursday Apr. 11, 2013
Successive Approximation and Time Interleaving for Sub-90nm CMOS ADCs
Rick Carley
Carnegie Mellon University
Monday Apr. 08, 2013
Holistic Circuits: or How I Learned to Stop Worrying and Love the End of Moores Law
Ali Hajimiri
California Institute of Technology
Monday Mar. 25, 2013
Challenges in building resilient, energy-efficient processors and SoCs
Jim Tschanz
Intel Circuits Research Lab
Monday Feb. 25, 2013
Efficient Neural Computing using Cellular Array of Magneto-Metallic Neurons
Dr. Kaushik Roy
Purdue University
Monday Feb. 11, 2013
Innovation at Texas Instruments – How You Can Shape the Future
Art George
Texas Instruments
Friday Feb. 01, 2013
Inside Intel Logic Technology Development: Taking SRAM From 32nm Planar to 22nm Tri-gate Technology
Dr. Eric Karl
Intel Corporation
Monday Jan. 28, 2013
Electronics for Interacting with a Physically-Complex World
Dr. Naveen Verma
Princeton University
Wednesday Dec. 05, 2012
Advanced Design’s role within Logic Technology Development and the challenges of Moore’s law with regards to digital, analog and wireless circuits scaling
Dr. Jad Rizk
Intel Corporation
Monday Nov. 19, 2012
Ubiquity of Wireless Sensor Nodes – What are the Practical Challenges to Make it Happen?
Gangadhar Burra
Texas Intruments
Monday Nov. 05, 2012
It’s About Time! (Making Best Use of Information in Time)
Un-Ku Moon
Oregon State University
Monday Oct. 08, 2012
Architecture and Circuit Co-Design Techniques for Efficient Power Delivery for Multi-Core Processors
Dr. Nam Sung Kim
University of Wisconsin-Madison
Wednesday Sep. 26, 2012
Wire line channels and equalization techniques for data transmission at speeds 10Gps and above
Dr. Jun Cao
Broadcom
Tuesday Sep. 18, 2012
Beyond the Cloud – Key Technologies and Challenges
Ajith Amerasekera
Texas Intruments
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