Computer Engineering Seminar

Designing Multicores for Programmability: The Bulk Multicore Architecture

Josep Torrellas

University of Illinois, Urbana-Champaign
Wednesday, April 07, 2010
12:00pm - 1:30pm
Beyster Bldg. 3725

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About the Event

One of the biggest challenges facing computer architecture today is the design of parallel architectures that efficiently support a highly-programmable environment. In this talk, I will present the Bulk Multicore Architecture, an architecture that is highly programmable, while delivering high performance and keeping the hardware simple. The Bulk Multicore is based on the idea of eliminating the commit of individual instructions. It supports sequential consistency and offers substantial advantages for new software environments and new tool development. I will discuss the ongoing architecture, compilation, and tool efforts.


Josep Torrellas (http://iacoma.cs.uiuc.edu) is a Professor and Willett Faculty Scholar at the University of Illinois. Prior to being at Illinois, Torrellas received a PhD from Stanford University. He also spent a year IBM's T.J. Watson Research Center. Torrellas's research area is multiprocessor computer architecture. He leads the Bulk Multicore Architecture project. Prior to that, he led the Illinois Aggressive COMA Multiprocessor project and had been involved in the Stanford DASH and the Illinois Cedar multiprocessor projects. He has contributed extensively in the area of shared-memory multiprocessor architecture and thread-level speculation. He received several best-paper awards. He is an IEEE Fellow.

Additional Information

Contact: Edward Chusid

Phone: 764-4329

Email: ejc@eecs.umich.edu

Sponsor(s): EECS-CSE-ACAL

Open to: Public

Web Page: http://iacoma.cs.uiuc.edu/~torrellas