Defense Event

Analysis of Retroactivity on the Output of a Transcriptional Component

Shridhar Jayanthi

Tuesday, October 16, 2012
10:30am - 12:30pm
2311 EECS

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About the Event

Abstract: Traditional engineering often relies in hierarchical design techniques to build complex systems from simpler subsystems. This technique requires modularity, a property that states that the input/output characteristics of a system are not affected by interconnections, and thus suffer from retroactivity. In this work we focus on synthetic biology interconnections employing transcription factors and show through analysis and experiments that these are susceptible to retroactivity from a downstream load. We show that the presence of DNA binding sites affect the steady state and dynamic behavior of an output transcription factor in a manner that depends on the stability of the transcription factor. We further propose a strategies based on timescale to mitigate retroactivity, either through modelling of retroactivity or designing insulation devices, synthetic device elements that are capable of mitigating retroactivity through timescale separation.

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Sponsor(s): Profs. James Freudenberg, Domitilla Del Vecchio

Open to: Public