About the Event
ABSTRACT — “What we can accomplish is limited not by our engineering expertise, but rather by our imagination: If we can agree on what we want to create, we
can build it!”
Medical Imaging Systems such as Computed Tomography (CT), Ultrasound, MRI, PET,
and others, have become valuable diagnostic tools. As an example, 60 million CT scans
were performed in the USA in 2008. The demand for improved image quality (resolution
and contrast), plus decreased time per image, has driven a dramatic increase in the number of channels (pixels) per system. Many recent CT systems comprise over a quarter of
a million sensing pixels, each with an associated data acquisition channel. This calls for
a drastic reduction in the size, power, and cost per channel, without compromising the
imaging performance of each channel – sensor interface to digital output.
This talk will focus on an integrated 128-channel data acquisition chip for CT. I will discuss the choice of an architecture to optimize overall CT performance within the density, power, and cost constraints. I will present circuit details of various internal blocks,
including the input amplifier (integrator) and ADC, and how they work together to optimize the dynamic range and signal-to-noise.
The chip contains 128 input integrators, 128 sample-hold circuits, ADC buffers, 2 highly
multiplexed 16-bit ADCs, and a digital post-processor. The chip is highly configurable,
supporting resolution versus throughput tradeoffs from over 1ksps at 24-bits to 20ksps
at 20-bits. I will conclude with a discussion of the resulting chip specifications, and its
impact on CT imaging performance.
BIO — Mike Coln has been a designer of high-resolution monolithic converters at ADI
since 1988. He has been engaged in the design of several dozen products, particularly
D/A and A/D converters for instrumentation and process control. His designs have included resistor ladder structures (both laser-wafer-trimmed and internally calibrated),
sigma-delta architectures, and switch-capacitor implementations; and the products
have been manufactured in processes ranging from BiCMOS to deep-sub-micron CMOS.
Mike developed architectures and designs for high-resolution successive-approximation A/D converters for the company’s PulSAR™ line of A/D converters. More recently,
he has focused on innovative monolithic architectures for entire signal chains, such as
precision data acquisition ASICs for computed-tomography (CT) medical imaging.
Prior to joining ADI, Mike was a Member of the Technical Staff at HP Labs in Palo Alto,
developing a calibrated high speed 12-bit ADC in a bipolar process.
Mike holds or has pending over two dozen patents relating to circuit architecture and
design. He earned his B.S. from CalTech in 1976, and his M.S. and Ph.D. from M.I.T. in 1979