About the Event
As silicon technology continues to scale down transistor size, fundamental characteristics of digital systems are dramatically changing. Such changes impose three barriers that current computer architectures struggle to overcome: increasing number of hardware failures, challenges in managing heterogeneous components, and skyrocketing system complexity.
This thesis first investigates the limitations of current processor designs, with particular focus on analyzing the consequences of unreliable components. We observed that programs rarely stress all hardware units uniformly and microprocessor utilization varies even within the execution of an application. This insight guided the development of the low-cost adaptive reliability technique used to diagnose faulty components in our architecture.
The second property we achieve in our architecture is adaptability. Adaptable hardware can dynamically match software demands, environmental characteristics, and physical defects. In our design, components dynamically exchange information about their condition and utilization, and the system is reconfigured to match hardware functionalities and application needs without relying on a central manager.
In order to overcome the third concern, design complexity, our architecture is fully composable. Our design organizes hardware modules into a reconfigurable fabric of small, state-less units. Each component can accomplish one or more services towards the execution of a portion of a program. Such a design greatly simplifies hardware organization, since each component is autonomous, and the number of available service providers does not affect the operations of the rest of the system.
Finally, this dissertation presents a complete distributed computer architecture, which by construction targets the challenges that jeopardize the adoption of future semiconductor technologies.