Modern integrated circuits are increasingly subject to physical limitations, such as the speed of light, the two dimensions in which they are laid out, and the relatively poor scaling of wire delays compared to gate delays. Our research addresses these challenges in the specific areas of circuit partitioning, automatic floorplanning, module and transistor placement, physical synthesis, routing and design for manufacturability.
We are studying methodologies and algorithms that promise to improve the performance, power dissipation and cost of next-generation microprocessors, ASICs, systems-on-chip, and other integrated circuits. Our research projects often combine expertise in computer engineering, software development, algorithms, and optimization.
Related Labs, Centers, and Groups
Advanced Computer Architecture Laboratory
Solid-State Electronics Laboratory