Wide-dynamic range CMOS image sensor
Dynamic range of natural scenes that we see in daily life is over 100dB. Unfortunately, solid state imaging devices only cover 60~70dB at most without any special circuit technique. There have been many researches to increase dynamic range. Although all the methods make dynamic range extended effectively, they require either huge additional hardware, or high frame rate multiple images to reconstruct the final image, which requires high power consumption.
We proposed a wide dynamic range CMOS image sensor with in-pixel floating-node analog memory for pixel level integration time control. There is no significant additional hardware in the pixel because we use a floating-node parasitic capacitor as an analog memory. Moreover, there is neither additional timing budget nor significant sacrificing of any other CIS characteristics. With the proposed sensor scheme, we could achieve the extended dynamic range by more than 42dB. A demonstration chip has been fabricated using a 0.18µm 1P4M 3.3V/1.8V CMOS process.
Figure 1. Chip Micrograph
(a) Normal Image
(b) Wide Dynamic Range Image
Figure 2. Sample Images
- S. -W. Han, S. -J. Kim, J. Choi, C. -K. Kim, and E. Yoon, "A High Dynamic Range CMOS Image Sensor with In-Pixel Floating-Node Analog Memory for Pixel Level Integration Time Control," Dig. Symp. VLSI Circuits, pp. 31-32, June 2006.