EECS 452: Digital Signal Processing Design Laboratory

Class Schedule

Class schedule (lecture dates, homework and lab assignment due dates, exam dates, etc.) can be found here.

Class Overview

EECS 452 is a senior/graduate design course whose main focus is the application of real-time digital signal processing (including theory, software and hardware) to a multi-week team project. This course satisfies the CoE's major design experience requirement. The course consists of lectures, structured laboratory exercises, and team projects. The lectures and structured laboratory exercises are intended to provide a foundation for the team projects to build on. The lectures and structured laboratory exercises cover:

• Architectural features of DSP processors (arithmetic, memory organization, pipe lining, and use of special on-chip hardware),
• Amplitude quantization effects (in A/D and D/A conversion, waveform generation and digital filter implementation),
• Special on-chip hardware (serial ports, host ports, and timers),
• Programming of DSP processors,
• Design and implementation of FIR and IIR filters,
• FFT usage,
• Real-time concepts (interrupts, critical sections, threads of execution, etc.).

The laboratory exercises are based on use of the Texas Instruments C5515 eZDSP stick and the Altera DE2-70 FPGA board. Programming will be in C, VHDL and MATLAB.

Textbooks

There are no required books (the first listed below is an recommended textbook), but you might find the following useful and they are on reserve at the Media Union reserve desk.

• Understanding Digital Signal Processing (2nd or 3rd Edition) by Richard Lyons, 2011
• Applied signal processing, Dutoit and Marques, 2009.
• Fundamentals of Digital Signal Processing Using MATLAB, 2nd Edition by Schilling/Harris, 2011
• Digital Signal Processors: Architectures, implementations and applications, S.M. Kuo and W.-S. Gan, Prentice-Hall, 2005.5
• Digital Signal Processing, 4th ed. Proakis and Manolakis, Pearson, 2006.
• Real-Time Digital Signal Processing from MATLAB to C with the TMS320C6x DSPs, Second Edition, T.B. Welsh, H.G. Cameron and M.G. Morrow, Taylor and Francis, 2011.

Course policies

You are encouraged to interact with other students to discuss course material, form study groups for the exams, help each other learn Verilog and the CAD tools, and provide each other with debugging assistance, encouragement, and moral support. However, all individual assignments (i.e., homeworks and exams) are to be performed on your own, and all group assignments (labs and the project) are to be performed only by members of the group.

Referring to homeworks or projects from previous semesters is strictly forbidden.

The Engineering Honor Code obligates you not only to abide by this policy, but also to report any violations that you become aware of. Violations of this policy will be brought to the College of Engineering's Honor Council. For more information on the Honor Code, see the Honor Council web page. If you have any doubts about whether a certain level of collaboration is permissible, or have any other questions, contact the professor.

Laboratory Policies

Laboratory Access
The EECS 452 laboratory takes place in EECS 4341, which uses a key lock access system which allows students 24 hour, 7 day access. Students are free to use the laboratory during off hours (when no other class is using it) to complete labs, to work on the course project, or to pursue personal projects. Lab attendance at the regular times is required. Please make every effort to keep the lab clean and tidy. Also please turn off the lights and close the door shut if you are the last to leave!!

Laboratory Computers
The laboratory has eight stations each consisting of a computer, two 19 inch monitors, an oscilloscope, a waveform generator, a C5515 eZDSP stick and a DE2 FPGA board from Altera. Each student group has free access to these systems and may leave their programs resident between work sessions. However disks do fail, systems do crash, and students sometimes do accidentally delete files that they really hadn't meant to. It is strongly urged that at the end of each work session that source files be copied onto a USB memory stick as backup. Not doing so has cost precious time in past semesters.

Manuals and Handouts
All manuals and documentation documenting the hardware and software used in the EECS 452 laboratory is on the web and can be found on these webpages. Copies of lecture and lab handouts will be available on the web page.

Assignments and Grading

During the class you will be expected to do labs, homework, a final project, and to take a midterm exam. These will be used to compute your grade as follows:

	Lab	20%
	Homework	10%
	Midterm exam	20%
	Final Project	50%

Laboratory
The structured laboratory experiments will be worked in groups of two. The prelab exercises are to be done individually and will count for 25% of the lab grade (i.e., 5% of the course grade). The intent of the prelab exercises is to determine a student's understanding of the current experiment, the hardware, and the associated code. The prelab exercises are due at the beginning of the associated lab period.

• Lab exercise 1: Introduction to the C5515 eZDSP Stick
• Lab exercise 2: Basic DSP Using the C5515 eZDSP Stick
• Lab exercise 3: Introduction to the DE2-70 FPGA board
• Lab exercise 4: DSP on the DE2-70 FPGA board
• Lab exercise 5: IIR filters
• Lab exercise 6: Interrupts, FFT, and Graphics

A report on each week's lab work is required by each group of two students. The lab reports will count for 75% of the lab grade (i.e., 15% of the course grade). Your lab report will consist solely of the answers to the questions in the lab. The report need not be lengthy and but must be typed. Be complete and professional in your presentation. Reports are due 1 week from the date of when the lab met. The report grade will be reduced by 2% for each day late.

In addition there will be an optional Lab 7 on SPI which may be useful to those whose projects involve communicating between the Altera DE2 and the DSP board.

Homework
Homework covering the material presented in lecture will be assigned. Late homework will not be accepted once the solution has been posted. The purpose of the homework is to reinforce the material covered in lecture and lab. The homework can be discussed with others, the instructor, and/or the GSI. However, all work (program code, plots, and the written homework) must be done individually.

Exams
A midterm exam will be given near the completion of the structured laboratories. This will cover fundamental topics introduced in the lectures and the laboratory experiments. There will not be a final exam.

Project
Projects will involve the design and implementation of a real-time software package and/or hardware device based on use of DSP. More information on projects will be provided later in the semester.